In this lesson, you will learn how to unify independent arithmetic and logic circuits into a single, cohesive Arithmetic Logic Unit (ALU) using a central control signal.
The Concept: Centralized Data Processing
Up to now, we have treated our adders, subtractors, and logical gates (AND, OR, XOR) as isolated building blocks. An ALU is the "brain" that combines these functions so the processor can perform different operations on the same data inputs. To do this, we don't just wire everything together; we use a Multiplexer to act as a traffic controller.
Integrating the Architecture
Imagine you have two 8-bit inputs, A and B. You want to perform either an addition or a bitwise AND operation. You feed A and B into an Adder module and an AND-gate array simultaneously. Both circuits calculate their results, but we only care about the result of the operation we currently need.
By using a Function Selector signal as the selection input to a Multiplexer, we can "route" only the desired output to the final result bus.
// Simplified conceptual integration
always @(*) begin
case (select_signal)
2'b00: result = A + B; // Addition
2'b01: result = A - B; // Subtraction
2'b10: result = A & B; // Logical AND
2'b11: result = A ^ B; // Logical XOR
endcase
end
Why a Multiplexer?
The Multiplexer is essential because it effectively "mutes" the operations we aren't currently using. Without it, the outputs of the Adder and the AND-gate would collide on the data bus, causing electrical contention and unpredictable behavior. By using the select_signal to drive the Multiplexer, we ensure that the rest of the computer only sees the output of the specific function requested by the control unit.
This modular architecture allows us to expand the ALU simply by adding more circuits to the Multiplexer inputs and increasing the number of bits in our Function Selector. It turns a collection of disparate gates into a single, programmable computational engine.
Key Takeaway: An ALU uses a Multiplexer to route the output of the requested arithmetic or logic circuit to the data bus, ensuring that only the chosen operation provides the final result.