Implementing Control Units for Processors

You will design the control unit of a simple processor using Finite State Machines to orchestrate instruction execution cycles.

In this lesson, you will learn how to use a Finite State Machine (FSM) to orchestrate the movement of data inside a processor.

The Role of the Control Unit

Up until now, you have built individual components like adders, registers, and multiplexers. However, these parts are just "dumb" hardware waiting for instructions. The Control Unit acts as the conductor of an orchestra. It tells the data path when to move data and what to do with it based on the current instruction.

To perform even a simple addition, the processor must follow a sequence of steps:

Fetch: Get the instruction from memory.
Decode: Understand what the instruction wants (e.g., "Add").
Execute: Trigger the ALU and store the result.

Designing the FSM

We model this cycle as a Moore Machine. Each state in our FSM represents a phase of the instruction execution. Let's look at a simplified 3-state controller:

State 0 (Fetch):   PC -> Memory_Address; Instruction -> IR;
State 1 (Decode):  Extract Opcode;
State 2 (Execute): ALU_Enable = 1; Result -> Accumulator;

In each state, the Control Unit outputs specific control signals. For example, in State 2, the output logic sets a signal high to enable the ALU, while in other states, that signal is low.

Implementation Logic

To implement this, you combine your knowledge of Next State Logic and Output Logic:

Next State Logic: This is your combinational circuit that determines the next state based on the current state and the "Opcode" (the instruction input). If the instruction is "ADD," the transition logic moves from Fetch to Decode to Execute.
Output Logic: This decodes the current state into actual wire signals (like WriteEnable for a register or Select lines for a multiplexer).

By using the state registers (Flip-Flops) to hold the current step, the Control Unit ensures the processor never tries to "execute" an instruction before it has finished "fetching" it. You are essentially building a circuit that "remembers" which step of the program it is currently processing.

Key Takeaway: The Control Unit is simply an FSM where the "states" represent the steps of an instruction cycle and the "outputs" are the electrical signals that drive your data path components.