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Lesson 32 of 9361. Foundations of Digital Logic and Computer ArchitectureFree lesson

Building Signed and Unsigned Multipliers

Learners will construct hardware multipliers using shift-and-add algorithms to process fixed-point binary numbers efficiently within a data path.

Building Signed and Unsigned Multipliers

In this lesson, you will learn how to build hardware multipliers that use the "shift-and-add" algorithm to calculate the product of two binary numbers.

The Logic of Multiplication

Think of long multiplication from elementary school, but in binary. To multiply two 4-bit numbers, you look at each bit of the multiplier. If the bit is 1, you add the multiplicand to your running total. If the bit is 0, you add nothing. However, because each bit represents a different power of two, you must shift the multiplicand to the left before processing the next bit.

Implementing the Hardware Data Path

To build this, we use a few components you’ve already mastered:

  1. Registers: To hold the Multiplicand, the Multiplier, and the Accumulator (the partial result).
  2. Adders: A Ripple Carry or Carry Lookahead Adder to perform the addition.
  3. Control Unit: An FSM that orchestrates the shifting and adding over several clock cycles.

For an unsigned multiplier, we simply add the shifted multiplicand to the accumulator whenever the current multiplier bit is 1.

Repeat for N bits:
1. If LSB of Multiplier == 1:
     Accumulator = Accumulator + Multiplicand
2. Shift Multiplicand Left
3. Shift Multiplier Right

Handling Signed Numbers

Signed multiplication is slightly trickier because of two’s complement representation. If you simply apply the shift-and-add method to negative numbers, the leading sign bits (1s) will cause errors.

The most common approach is Booth’s Algorithm or a simpler "convert-and-correct" method:

  • Convert both operands to positive (take the absolute value).
  • Perform the unsigned multiplication.
  • If the original signs were different, perform a two's complement subtraction on the final product to make it negative.

By utilizing your existing knowledge of registers and adders, you can build a sequential circuit that processes these bits one by one, keeping the hardware footprint small compared to a massive combinational multiplier that would require thousands of gates.

Key Takeaway: Hardware multipliers replace complex combinational logic with sequential shift-and-add operations, using registers to store partial products and control logic to manage the iterative accumulation process.