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Lesson 20 of 9361. Foundations of Digital Logic and Computer ArchitectureFree lesson

State Transition Diagram Construction

You will translate functional requirements into visual state transition diagrams that map system behavior across all possible input conditions.

In this lesson, you will learn how to translate a system's functional requirements into a visual map that dictates exactly how the system moves from one state to another based on inputs.

From Logic to Roadmap

A State Transition Diagram is the blueprint for your sequential logic. While a Finite State Machine (FSM) definition tells us what the pieces are (states, inputs, outputs), the diagram tells us how the system behaves over time.

To construct one, follow these three steps:

  1. Define the States: Represent each unique condition of your system as a circle (e.g., IDLE, READING, ERROR).
  2. Define Transitions: Draw directed arrows between circles. An arrow represents the path taken when a specific input condition is met.
  3. Define Outputs: Label the arrows or the states with the resulting output signals.

Concrete Example: A Simple Push-Button Toggle

Imagine a system with one button input (B) and one LED output (L). The system starts in OFF. If B=1, it moves to ON. If B=1 again, it returns to OFF.

       (B=1)
      +------>+
      |       |
    [OFF] <-> [ON]
      ^       |
      +-------+
        (B=1)

The "All Conditions" Rule

The most common mistake beginners make is leaving "holes" in the diagram. A robust FSM must account for every possible input at every state. If your system is in STATE A and the input X is 0, but you haven't drawn a path for X=0, your circuit's behavior becomes undefined (or unpredictable).

When building your diagram, ask: "If I am in this state, what happens if the input is 0? What happens if it is 1?" Every state should have a number of exiting arrows equal to the total number of possible input combinations. This ensures that your state register never enters a "locked" or "illegal" state due to missing logic. By mapping these out visually before writing a single line of Verilog or drawing a schematic, you transform abstract requirements into a predictable, testable flow of logic.

Key Takeaway: A complete state transition diagram must explicitly define the next state for every possible input combination to ensure the machine remains deterministic and robust.