In this lesson, you will learn how to mathematically configure the CAN bit timing segments to ensure all nodes on your network perceive the same bit rate and synchronize their internal clocks.
The Anatomy of a CAN Bit
Unlike I2C, which uses a dedicated clock line, CAN is asynchronous; nodes must agree on the timing of a single bit duration without a shared clock wire. To achieve this, the CAN standard divides a single bit time into a specific number of discrete units called Time Quanta (TQ).
A single bit period is composed of four distinct segments:
- Sync Segment (Sync_Seg): Always 1 TQ long. Used to synchronize the various nodes; a transition on the bus should ideally occur here.
- Propagation Segment (Prop_Seg): Compensates for the physical delay of signals traveling through the wires and transceiver hardware.
- Phase Segment 1 (Phase_Seg1): Used to compensate for oscillator drift; can be lengthened during resynchronization.
- Phase Segment 2 (Phase_Seg2): Used to terminate the bit; can be shortened during resynchronization.
The Sample Point
The Sample Point is the exact moment the controller reads the bus state to determine if the bit is dominant or recessive. It occurs at the end of Phase_Seg1. A common industry standard is to place the sample point at 75% to 80% of the total bit time.
If your bit rate is 500 kbps, the total bit time is 2,000 ns. If you set your sample point to 80%, you must ensure the sum of Sync_Seg + Prop_Seg + Phase_Seg1 accounts for 80% of your total TQ count.
Example Configuration
If your controller clock is 40 MHz and you want a 500 kbps baud rate, you first set a prescaler to reach a TQ of 250 ns (4 MHz).
- Total TQ per bit = 8.
Sync_Seg= 1 TQ.Prop_Seg= 2 TQ.Phase_Seg1= 3 TQ.Phase_Seg2= 2 TQ.
Calculation: Sample Point = (1 + 2 + 3) / 8 = 75%.
If nodes are misaligned, they will sample the bit at the wrong time, leading to Bit Errors or Form Errors that crash communication.
Key Takeaway: Precise bit timing requires balancing the Propagation Segment for cable length and the Phase Segments for oscillator tolerance to ensure the Sample Point correctly identifies the bit state.