In this lesson, you will learn how to expand your I2C communication capabilities by utilizing ten-bit addressing to support larger arrays of unique devices on a single bus.
Breaking the Seven-Bit Barrier
In standard I2C, we use a 7-bit address, which allows for only 128 unique addresses. However, as your system grows, you may need to connect more than 128 devices or avoid address collisions. To solve this, the I2C protocol allows for a 10-bit addressing mode. This scheme uses a special reserved header sequence to signal to all devices that a longer address is coming.
The Two-Byte Header Sequence
Instead of sending a single address byte, 10-bit addressing requires sending two bytes immediately after the START condition:
- First Header Byte: This byte begins with the reserved pattern
11110xx, wherexxrepresents the two most significant bits (MSBs) of your 10-bit address. The final bit is the Read/Write flag. - Second Header Byte: This byte contains the remaining 8 bits of the 10-bit address.
By using this two-byte sequence, you can uniquely identify up to 1,024 different devices. Any device on the bus that recognizes the 11110 pattern in the first byte knows to listen for the second byte to determine if it is the intended target.
Conceptual Implementation
When your master controller initiates a transmission, the sequence looks like this in code logic:
// Sending a 10-bit address (e.g., 0x2A5)
// First byte: 11110 | MSB(0x2A5>>8) | Write(0)
I2C_Send(0xF0 | ((address >> 7) & 0x06));
// Second byte: LSB(0x2A5)
I2C_Send(address & 0xFF);
The hardware logic on the slave side is designed to ignore standard 7-bit addresses if it is configured for 10-bit mode. It waits for the 11110 prefix, captures the two MSBs, and checks if the following byte matches its internal address register. If a match is found, the device pulls the SDA line low to send an Acknowledge (ACK) bit, just like in standard 7-bit communication.
Key Takeaway: 10-bit addressing expands your bus capacity by using a reserved 11110 prefix in the first byte to signal that the following two bytes represent an expanded, 1,024-node address space.