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Lesson 357 of 9365. Communication Protocols and Data TransferFree lesson

SPI Master-Slave Bus Topology

Implement the hardware wiring requirements for a single-master SPI bus including MOSI, MISO, SCK, and individual Slave Select lines.

In this lesson, you will learn how to physically connect components in an SPI (Serial Peripheral Interface) bus topology to enable synchronized master-slave communication.

The SPI Architecture

Unlike UART, which uses a point-to-point connection, SPI is a synchronous protocol that supports a single-master, multi-slave configuration. Because the clock is shared, the master dictates the timing of every bit transfer. To make this work, the master and all connected slaves must share four specific signal lines:

The Signal Lines

  1. SCK (Serial Clock): The master generates this signal to coordinate when data is shifted out of or sampled by the devices.
  2. MOSI (Master Out, Slave In): The data line used by the master to send information to the slaves.
  3. MISO (Master In, Slave Out): The data line used by the slaves to send information back to the master.
  4. SS (Slave Select): Also known as Chip Select (CS), this is the mechanism for addressing.

Implementation Wiring

To implement this topology, you wire the SCK, MOSI, and MISO pins of the master directly to the corresponding pins on every slave device. This creates a "shared bus." However, the SS line must be unique for every slave.

If you have two slaves (Sensor A and Sensor B), you connect the master's SS1 pin to Sensor A’s SS pin, and the master's SS2 pin to Sensor B’s SS pin. When the master wants to talk to a specific device, it pulls that device's specific SS line LOW (logic 0). All other slaves see their SS lines held HIGH, signaling them to remain in a high-impedance (ignored) state on the MISO line.

Wiring Logic Example

[Master] 
  |--SCK----------> (SCK to Slave 1 & 2)
  |--MOSI---------> (MOSI to Slave 1 & 2)
  |--MISO<--------< (MISO from Slave 1 & 2)
  |--SS1----------> (SS on Slave 1)
  |--SS2----------> (SS on Slave 2)

By toggling these SS pins, the master controls exactly which slave is active, ensuring that only one device responds to the SCK and MOSI signals at any given moment.

Key Takeaway: The SPI master manages communication by broadcasting a shared clock and data line while using individual Slave Select lines to isolate and address specific devices on the bus.