Configuring Voltage Scaling for Frequency Transitions

In this lesson, you will learn how to safely synchronize voltage scaling with clock frequency adjustments to balance system power consumption and performance.

The Physics of Power

In microcontrollers, power consumption is heavily influenced by the supply voltage ($V$) and the operating frequency ($f$). Specifically, dynamic power scales with the square of the voltage ($P \propto V^2f$). When you need to reduce power during light workloads, you lower the clock frequency. However, if you keep the voltage high while the frequency is low, you waste significant energy. Conversely, if you lower the voltage too far while the frequency remains high, the logic gates will fail to switch states in time, causing the system to crash.

The Golden Rule: Sequence Matters

To maintain system stability, you must follow a strict order of operations during transitions.

When increasing performance (going from low frequency to high frequency), you must increase the voltage first. You need the higher supply voltage to provide enough "oomph" for the transistors to keep up with the faster switching speed. Only after the voltage has stabilized at the higher level should you update your Clock Multiplexers to increase the frequency.

When decreasing performance (going from high frequency to low frequency), the order must be reversed: decrease the frequency first. By lowering the clock speed first, you ensure the system is already running slowly before you pull the rug out from under the logic by lowering the voltage.

Implementation Logic

While specific register implementations vary by hardware, the sequence in your bare-metal C code should look like this:

void set_high_performance_mode() {
    // 1. Increase voltage to target level
    configure_voltage_regulator(VOLTAGE_HIGH);
    wait_for_voltage_stabilization();

    // 2. Increase clock frequency via PLL/Multiplexers
    select_high_speed_clock_source();
}

void set_power_save_mode() {
    // 1. Decrease clock frequency first
    select_low_speed_clock_source();

    // 2. Decrease voltage after clock is stable
    configure_voltage_regulator(VOLTAGE_LOW);
}

By respecting this "Voltage-First Up, Frequency-First Down" rule, you prevent the hardware from entering an undefined state where the voltage is insufficient for the clock speed.

Key Takeaway: Always increase voltage before frequency when scaling up, and decrease frequency before voltage when scaling down to ensure stable logic transitions.