Reducing Quiescent Current in External Peripheral Power Rails

In this lesson, you will learn how to implement high-side power gating using MOSFET switches to physically disconnect power from external peripherals, effectively eliminating quiescent current during system sleep.

The Problem with Standby Current

Even when a microcontroller is in a deep sleep state, external peripherals—such as high-precision sensors or communication modules—often continue to draw quiescent current. While individually small, this "leakage" adds up, especially in battery-operated devices. Simply setting pins to a high-impedance state (as covered in previous lessons) is often insufficient because the peripheral's internal circuitry might still be energized through its power pins.

Designing a High-Side Switch

The most effective way to eliminate this draw is to insert a P-channel MOSFET (PMOS) between the main voltage rail and the peripheral’s VCC pin. When the PMOS is OFF, the peripheral is entirely isolated from the power supply, reducing its quiescent current to nearly zero.

To control this from a microcontroller, use a small N-channel MOSFET as a level shifter or driver to pull the gate of the PMOS to ground.

// Conceptual control of a power gate
#define GATE_PIN GPIO_PIN_0 

void peripheral_power_on(void) {
    // Drive gate low to turn on PMOS (assuming active-low logic)
    GPIO_Write(GATE_PIN, 0);
}

void peripheral_power_off(void) {
    // Drive gate high to turn off PMOS
    GPIO_Write(GATE_PIN, 1);
}

Critical Design Considerations

When implementing this, keep two factors in mind. First, consider the inrush current. When the MOSFET switches on, the peripheral’s decoupling capacitors will charge rapidly. If the current spike is too large, it may cause a voltage sag on your main rail, potentially triggering a brown-out reset of your microcontroller. You may need to limit the transition speed of the gate driver if this occurs.

Second, ensure your GPIO pins are configured to maintain their state during deep sleep. If a floating pin causes the MOSFET to partially conduct, you will lose the efficiency gains you are working to achieve. By physically gating the rail, you ensure that the peripheral consumes zero energy while the system is inactive.

Key Takeaway: Using a MOSFET as a high-side switch allows for complete power disconnection of external modules, transforming non-zero standby consumption into an ideal zero-leakage state.