Managing IO Pin States During Deep Sleep

Define safe and power-efficient configurations for all GPIO pins during sleep modes to prevent floating inputs and parasitic current leakage through external circuits.

In this lesson, you will learn how to configure GPIO pins during deep sleep to eliminate parasitic current leakage and prevent the undefined logic states that arise from floating inputs.

The Physics of Floating Inputs

In CMOS circuitry, an input pin left in a high-impedance (floating) state is a recipe for power disaster. Because the gate of a MOSFET has extremely high input impedance, it acts as a tiny capacitor that can be charged by ambient electromagnetic noise. If the pin voltage hovers near the threshold region (between VIL and VIH), both the PMOS and NMOS transistors in the input buffer partially conduct simultaneously. This creates a "shoot-through" path from VDD to VSS, resulting in significant, unintended static current consumption—often orders of magnitude higher than the microcontroller's actual sleep current.

Configuring for Zero Leakage

To manage these states, you must transition your GPIOs into a deterministic state before entering deep sleep. The optimal configuration depends on the external circuit connected to the pin:

Output-Driven Pins: If you are driving an external component, keep the pin configured as an OUTPUT with a logic level that corresponds to the "off" state of your external hardware.
Input Pins: If the pin must remain an input, you must define its potential. Enable internal pull-up or pull-down resistors to ensure the pin is tied to a stable rail.
Disconnected Pins: For unused pins, the best practice is to configure them as OUTPUT low or high to terminate the path, or set them to a high-impedance mode only if you are certain no external voltage source will induce floating behavior.

Consider this logic for a sensor interface before entering sleep:

// Ensure the pin is tied to a known potential
// Assuming a sensor that pulls to GND when inactive
GPIO_SetMode(PORTA, PIN0, MODE_INPUT);
GPIO_EnablePullUp(PORTA, PIN0); // Ties input to VDD, preventing floating

// Enter Deep Sleep
EnterDeepSleep();

By ensuring every pin has a low-impedance path to either VDD or GND, you prevent the input buffer from entering its linear region, keeping your total system current within the micro-amp range.

Key Takeaway: Never allow a CMOS input to float during deep sleep; always force a definitive logic level via internal or external resistors to prevent shoot-through current.