Principles of Weighted Resistor and R-2R Ladder Networks

In this lesson, you will learn how to calculate discrete voltage output levels using binary-weighted resistor and R-2R ladder architectures to convert digital signals into analog voltages.

Digital-to-Analog Converters (DACs) translate binary numbers from your microcontroller into physical voltages. The simplest method is the Weighted Resistor Network. Imagine a series of switches controlled by your CPU’s GPIO pins. Each resistor is sized as a power of two relative to the others (e.g., $R$, $2R$, $4R$, $8R$). Because the current passing through each resistor is inversely proportional to its resistance, the least significant bit (LSB) contributes the smallest current, while the most significant bit (MSB) contributes the largest.

The output voltage ($V_{out}$) for a 4-bit weighted network is calculated as: $V_{out} = V_{ref} \times \left( \frac{D_3}{2^1} + \frac{D_2}{2^2} + \frac{D_1}{2^3} + \frac{D_0}{2^4} \right)$ (Where $D_n$ is the state of the pin, 0 or 1). While intuitive, this becomes physically difficult to manufacture for high-precision DACs because the resistor values required for the MSB become extremely small and hard to match accurately.

To solve this, we use the R-2R Ladder Network. This design uses only two resistor values: $R$ and $2R$. By arranging them in a repeating ladder structure, each node effectively halves the voltage contribution of the previous stage. This is much easier to fabricate on silicon, as it only requires maintaining the ratio between two identical resistor types rather than absolute precision across many different values.

For an R-2R ladder, the output is defined by: $V_{out} = V_{ref} \times \frac{\text{Digital Code}}{2^n}$ Where $n$ is the number of bits. If you are writing a routine to drive this via GPIO, you simply map your integer value to the port:

// Example: Writing to an 8-bit R-2R DAC connected to Port A
void write_dac(uint8_t value) {
    GPIOA->ODR = value; // Direct bit-mapping to the resistive ladder
}

By balancing these resistive loads, we create a precise stair-step voltage profile that scales linearly with the binary input provided by our CPU.

Key Takeaway: Weighted resistor networks use exponentially increasing resistance to sum currents, while R-2R ladders achieve the same result using a repeating ratio, offering significantly better manufacturing precision for embedded DACs.