BiteSizedChunks.comLearn one small thing at a time.
Course contentsShow
← Embedded Systems & Computer Architecture
Lesson 327 of 9364. Peripheral Interfacing and ControlFree lesson

Optimizing Bus Arbitration and Latency

Analyze bus arbitration logic to minimize system latency and prevent CPU starvation during heavy DMA traffic scenarios.

In this lesson, you will learn how bus arbitration logic functions to balance high-speed DMA data movement with the CPU’s need to execute instructions without stalling.

The Balancing Act

In an embedded system, the system bus is a shared highway. When you enable high-bandwidth DMA transfers—such as streaming data from an ADC—the DMA controller frequently requests "bus mastership." If the DMA controller is too aggressive, it hogs the bus, causing CPU starvation, where the processor cannot fetch instructions or data, leading to increased system latency.

To prevent this, we use Bus Arbitration. The arbiter is a logic block that decides who gets control of the bus when multiple peripherals (or the CPU) request access simultaneously.

Strategies to Minimize Latency

  1. Fixed Priority Arbitration: You assign higher priority to the CPU than the DMA controller. While this keeps your mainline code responsive, it can cause "DMA underruns" if the CPU remains busy.
  2. Round-Robin Arbitration: The arbiter grants bus access in turns. This prevents the DMA from locking out the CPU entirely, ensuring that both have regular "time slices" on the bus.
  3. Burst Length Configuration: By configuring the DMA to transfer in smaller bursts rather than long, contiguous blocks, you allow the CPU to "interleave" its memory access between DMA bursts.

Conceptual Illustration

Imagine the bus arbiter acting like a traffic light. If the DMA controller (the heavy truck) is configured for a massive burst, it blocks the intersection for a long time. By limiting the burst size, we force the DMA to release the bus, letting the CPU (the agile car) pass through:

// Configure DMA for smaller bursts to let the CPU breathe
DMA_InitStructure.DMA_BurstSize = DMA_BURST_4; 
// Use Round-Robin priority so DMA doesn't starve the CPU
DMA_InitStructure.DMA_Priority = DMA_PRIORITY_MEDIUM;

When you notice your system becomes unresponsive during heavy data acquisition, check your arbitration settings. If you cannot reduce the DMA bandwidth, you must implement smaller burst lengths or increase the CPU’s arbitration priority to ensure it can still execute critical interrupt routines.

Key Takeaway: Efficient bus arbitration requires balancing DMA burst lengths and priority levels to ensure that high-speed data transfers do not block the CPU from executing time-critical system tasks.