In this lesson, you will learn how to shift the relative timing of independent PWM signals to create the precise phase offsets required for multi-phase motor control.
The Challenge of Phase Control
When driving a multi-phase motor, such as a brushless DC motor, you cannot simply fire all your PWM signals at once. If every phase turns on simultaneously, you create massive current spikes and torque ripple. To run a motor smoothly, you need to "stagger" the start times of your PWM pulses. While we have previously learned to generate simple PWM signals (Lesson 8), those signals are usually tied to the same timer reload event. To achieve phase control, we must manipulate the relationship between individual timer channels.
Aligning the Counter
The most robust way to synchronize phase-shifted channels is to use a single master timer that triggers multiple capture/compare channels. Each channel has its own Compare Register that determines when the signal transitions. By carefully calculating the values for each register relative to the timer’s Auto-Reload Register (ARR), you can offset the output edges.
Consider a system where you want to shift Phase B by 90 degrees relative to Phase A:
// Assume a timer period (ARR) of 1000
uint32_t period = 1000;
// Phase A: Starts at 0
TIMx->CCR1 = 0;
// Phase B: Shifted by 90 degrees (1/4th of the period)
TIMx->CCR2 = period / 4;
Hardware Synchronization
If your motor controller requires even more flexibility than one timer can provide, you must use Timer Triggering. You configure one "Master" timer to reset "Slave" timers. By introducing a precise delay or pre-loading the counter of the slave timer, you force the hardware to begin counting at a specific offset. This hardware-level synchronization ensures that jitter (Lesson 17) is kept to a minimum, as the phase relationship is locked in by the silicon rather than software interrupt timing.
Once these channels are synchronized, the motor controller gains the ability to create rotating magnetic fields, moving from simple pulse generation to high-performance power electronics.
Key Takeaway: Phase control is achieved by offsetting compare register values relative to the timer period or by using master-slave hardware triggering to lock multiple timers into a specific, staggered timing relationship.