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Lesson 1817 of 1,81915. Kernel Concepts for Systems AdministratorsFree lesson

Interrupt coalescing

You will tune network and disk controllers to group interrupts for performance.

In this lesson, you will learn how to optimize high-performance network and storage subsystems by tuning interrupt coalescing to balance throughput against latency.

The Interrupt Storm Problem

As we discussed in our study of Hardware interrupt request levels and Context switch profiling, every I/O operation—such as a network packet arrival or a disk block read—triggers an interrupt. When handling millions of packets per second, the CPU becomes overwhelmed by the overhead of context switching between the process context and the interrupt handler. This is often referred to as an "interrupt storm," where the kernel spends more time acknowledging interrupts than actually processing the payload.

Tuning for Coalescing

Interrupt coalescing is the strategy of forcing the hardware controller to wait until either a specific number of events have occurred or a maximum time threshold has passed before firing the interrupt. Instead of firing for every single packet, the controller buffers them and fires one interrupt for a "batch" of events.

For network interface cards (NICs), you can inspect and tune these parameters using ethtool. For example, to see current settings:

# Display coalescing settings for eth0
ethtool -c eth0

You will see parameters like rx-usecs (time to wait before interrupting) and rx-frames (number of packets to wait for). By increasing these values, you reduce the number of interrupts per second, significantly lowering CPU utilization during heavy traffic. However, this comes at the cost of increased latency, as packets must wait in the buffer before the CPU is signaled to process them.

Finding the Sweet Spot

To tune this effectively, you must profile your system. If you have a high-throughput storage array or a 100Gbps network link, increasing rx-usecs allows the kernel to process larger chunks of data in a single burst, effectively utilizing the CPU affinity and cache locality of your cores. If you are running a latency-sensitive application (like a real-time trading engine), you should lean toward lower values to ensure that the interrupt is fired as quickly as possible, even at the cost of higher CPU overhead.

Key Takeaway: Interrupt coalescing allows you to trade a small increase in latency for a significant reduction in interrupt overhead, optimizing your system for high-throughput I/O workloads.