In this lesson, you will learn how the Linux kernel maps physical hardware signals to specific CPU execution handlers to manage asynchronous events.
The Hardware-to-Kernel Bridge
When a hardware device—like a NIC or a storage controller—needs the CPU's attention, it sends a signal over a physical line called an Interrupt Request (IRQ) line. Because the CPU cannot stop everything to handle every microscopic event immediately, Linux uses a tiered architecture to map these signals to specific Interrupt Service Routines (ISRs).
Mapping Signals to Handlers
The mapping process begins with the Interrupt Controller (e.g., APIC on x86). When a hardware signal arrives, the controller notifies the CPU of the IRQ number. The kernel maintains an irq_desc structure for every possible interrupt line, which stores the pointer to the specific action (the ISR) that must be executed.
You can inspect the current mapping on your running system by viewing /proc/interrupts:
# Displaying active IRQ mappings
cat /proc/interrupts
In this output, you will see the IRQ number, the CPU core affinity (which core is handling the interrupt), the type of interrupt, and the registered driver (the handler).
The Split-Handler Strategy
To maintain system responsiveness, the kernel splits interrupt handling into two distinct parts:
- Top Half: This is the ISR itself. It runs with interrupts disabled for that line, performing only the absolute minimum work (e.g., acknowledging the hardware signal). It must be fast; if it lingers, the system experiences "interrupt latency," which can cause dropped network packets or stuttering I/O.
- Bottom Half (Tasklets/Softirqs): Once the Top Half acknowledges the hardware, the kernel schedules the "heavy lifting" (data processing, buffer copies) to occur in the Bottom Half. This allows the CPU to re-enable interrupts and handle other requests while the complex processing runs later.
By mapping a hardware signal to a two-stage handler, the kernel ensures that it remains responsive to high-frequency hardware signals without starving user-space processes or stalling the entire system.
Key Takeaway: Hardware interrupt request levels are the vital linkage between physical device signals and kernel-defined handlers, optimized through a two-stage process to minimize CPU blocking and maintain system throughput.