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Lesson 790 of 93611. Introduction to Embedded LinuxFree lesson

Handling Interrupts and GPIOs in Device Trees

Configure interrupt controllers and General Purpose Input/Output pins by correctly mapping phandles and flags within the hardware description file.

In this lesson, you will learn how to wire hardware signals to the kernel by mapping GPIOs and interrupt controllers using phandles and flags within the Device Tree.

The Role of Interrupts and GPIOs

In an embedded system, the CPU needs to know when an external event occurs—like a button press or a sensor threshold being reached. We represent these connections in the Device Tree (DT) by defining relationships between peripheral nodes and their controller nodes. Because hardware devices are often physically separate but logically connected, we use phandles (pointers to other nodes) to create these links.

Mapping Interrupts

When a device needs to signal the CPU, it references an interrupt controller. This is defined using the interrupts property, which specifies the interrupt line and the triggering behavior (e.g., rising edge vs. level-sensitive).

button@0 {
    compatible = "gpio-keys";
    interrupt-parent = <&gpio1>;
    interrupts = <17 IRQ_TYPE_EDGE_FALLING>;
};

Here, interrupt-parent points to the specific GPIO controller (defined elsewhere as a phandle), and the interrupts property provides the pin number (17) and the flag (IRQ_TYPE_EDGE_FALLING) that tells the kernel how to register the handler.

Mapping GPIOs

Similarly, if a device driver needs to manipulate a pin directly (e.g., turning on an LED), we use the gpios property. The structure is nearly identical to interrupts:

led@0 {
    compatible = "gpio-leds";
    gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>;
};

In this snippet, &gpio1 is the phandle to the controller node, 18 is the pin index, and GPIO_ACTIVE_HIGH defines the logic level required to toggle the LED.

Why this matters

By decoupling the hardware configuration from the source code, the Device Tree allows the same kernel binary to run on different board revisions. You aren't hardcoding register addresses; you are describing the topology of the system. The kernel parses these entries at boot to set up the IRQ descriptors and GPIO lines automatically, ensuring your drivers receive the correct signals without needing to know the low-level memory map of the specific SoC.

Key Takeaway: You connect hardware components to the kernel by defining an interrupt-parent or gpios reference, utilizing phandles to point to the controller and numeric flags to specify signal behavior.